vlog -reportprogress 300 -work work C:/Workspace/Intel/intelFPGA_lite/18.1/MAX1000_K1/Testbench.v

vsim -gui -l msim_transcript work.Testbench -Lf altera_mf

add wave -position insertpoint  \
sim:/Testbench/CLK12M \
sim:/Testbench/top/pclk \
sim:/Testbench/top/_K1/resetq \
sim:/Testbench/top/_K1/reboot \
sim:/Testbench/top/LED \
sim:/Testbench/top/tx_data \
sim:/Testbench/top/RXD \
sim:/Testbench/top/TXD \
sim:/Testbench/top/counter \
sim:/Testbench/top/_K1/code_addr \
sim:/Testbench/top/_K1/insn \
sim:/Testbench/top/_K1/mem_addr \
sim:/Testbench/top/_K1/mem_bw \
sim:/Testbench/top/_K1/dout \
sim:/Testbench/top/_K1/din \
sim:/Testbench/top/_K1/mem_rd \
sim:/Testbench/top/_K1/mem_wr \
sim:/Testbench/top/_K1/carry \
sim:/Testbench/top/_K1/pc \
sim:/Testbench/top/_K1/dsp \
sim:/Testbench/top/_K1/tos \
sim:/Testbench/top/_K1/nos \
sim:/Testbench/top/_K1/rsp \
sim:/Testbench/top/_K1/tor \
sim:/Testbench/top/myMem/address_b \
sim:/Testbench/top/myMem/byteena_b \
sim:/Testbench/top/myMem/clock \
sim:/Testbench/top/myMem/data_b \
sim:/Testbench/top/myMem/q_b

run 5 us
